Rechnersystem mit hoher Leistung

A parallel processor comprised of a plurality of processing nodes, each node including a processor and a memory. Each processor includes means for executing instructions, logic means connected to the memory for interfacing the processor with the memory and means for internode communication. The inte...

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Main Authors PALMER, JOHN FRANKLIN, TEMPE, ARIZONA 85284, US, COLLEY, STEPHEN RICHARD, SALINAS, CA 93907, US, JURASEK, DAVID WALTER, BANKS, OREGON 97106, US, RICHARDSON, WILLIAM STANLEY, BEAVERTON, OREGON 97007, US, WILDE, DORAN KENNETH, BEAVERTON, OREGON 97007, US
Format Patent
LanguageGerman
Published 07.10.1993
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A parallel processor comprised of a plurality of processing nodes, each node including a processor and a memory. Each processor includes means for executing instructions, logic means connected to the memory for interfacing the processor with the memory and means for internode communication. The internode communication means connect the nodes to form a first array of order n having a hypercube topology. A second array of order n having nodes connected together in a hypercube topology is interconnected with the first array to form an order n+1 array. The order n+1 array is made up of the first and second arrays of order n, such that a parallel processor system may be structured with any number of processors that is a power of two. A set of I/O processors are connected to the nodes of the arrays by means of 1/0 channels. The means for internode communication comprises a serial data channel driven by a clock that is common to all of the nodes.
Bibliography:Application Number: DE19863687764T