VERFAHREN ZUM HERSTELLEN EINES SPERRSCHICHT-FELDEFFEKTTRANSISTORS

The invention relates to a process for the fabrication of a field-effect transistor as described in German Patent Application No. P 35 35 002.4, corresponding to U.S. application Ser. No. 06/914,540 comprises first covering a semiconductor member with a layer which forms the channel region and part...

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Bibliographic Details
Main Author COLQUHOUN,ALEXANDER,DR
Format Patent
LanguageGerman
Published 30.07.1987
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The invention relates to a process for the fabrication of a field-effect transistor as described in German Patent Application No. P 35 35 002.4, corresponding to U.S. application Ser. No. 06/914,540 comprises first covering a semiconductor member with a layer which forms the channel region and part of which is covered with a passivation layer. Impurities are implanted into the exposed regions of the semiconductor surface and form underneath the channel region highly doped source and drain regions. A surface layer of the passivation layer is then removed in a section adjacent to the source region and a gate electrode is formed on the thus exposed narrow area of the channel region.
Bibliography:Application Number: DE19863602461