VERFAHREN ZUR HERSTELLUNG VON HALBLEITERANORDNUNGEN UNTER VERWENDUNG VON SILIZIUM-AUF- ISOLATOR TECHNIKEN

Process for the production of semiconductor devices by using silicon-on-insulator (SOI) techniques. The Si layers of the SOI structure include an interfacial layer of Si and a buffer layer of Si formed thereon, whereby the formation of stacking faults in the Si layers can be effectively prevented. P...

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Main Authors YAMAWAKI, HIDEKI, ISEHARA-SHI KANAGAWA 259-11, JP, KODAMA, SHIGEO, TOSHIMA-KU TOKYO 170, JP, IHARA, MASARU, CHIGASAKI-SHI KANAGAWA 253, JP, ARIMOTO, YOSHIHIRO, MACHIDA-SHI TOKYO 194, JP, KIMURA, TAKAFUMI, HIRATSUKA-SHI KANAGAWA 254, JP
Format Patent
LanguageGerman
Published 23.09.1993
Edition5
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Process for the production of semiconductor devices by using silicon-on-insulator (SOI) techniques. The Si layers of the SOI structure include an interfacial layer of Si and a buffer layer of Si formed thereon, whereby the formation of stacking faults in the Si layers can be effectively prevented. Pretreatment of the underlying insulating material with a molybdate solution and interposition of an additional layer of slowly grown single-crystalline Si between the buffer layer of Si and the overlying active Si layer are also effective to inhibit the stacking faults. Semiconductor devices with high quality can be produced with good yield.
Bibliography:Application Number: DE19853587377T