Monolithic integrated circuit with silicon substrate - has high and low voltage planar transistor zones formed with minimum high temp. treatment

• Main Author: GAHLE,HANS-JUERGEN,DR
• Format: Patent
• Language: English; German
• Published: 11.03.1982
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The monolithic integrated circuit which combines high voltage planar transistor zones with low voltage planar transmitter zones, is made in a process in which high temp. treatment is reduced to a minimum. Before the epitaxial layer (1) is formed on the surface (2) of the silicon substrate (4) which has a specific resistance of at least 2 ohm cm, dopant is applied to the sunken regions (3) of the high voltage transistor regions (Th). Ion implantation is used, and of the same conductivity type as that of the epitaxial layer. These regions occur between the substrate and the epitaxial layer. Doping material is also introduced into sunken regions (5) of the low voltage transistor regions (Tn,Ti) on the surface of the substrate, then the substrate surface is covered with the epitaxial layer. After diffusion of the base and other zones, contacts are formed on them. Contact zones (6) are also diffused into the high voltage transistor areas after application of the epitaxial layer, with highly doped intermediate layers (8).