Speicherzellengestaltung mit vertikal gestapelten Überkeuzungen

A memory cell with vertically stacked crossovers. In prior memory cells, crossover connections within the memory cell were implemented in the same device layer. This wasted valuable design space, since the crossovers were therefore required to sit side-by-side in the layout design. The present inven...

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Bibliographic Details
Main Authors BOHR, MARK T., ALOHA, OREG., US, GREASON, JEFFREY K., PORTLAND, OREG., US
Format Patent
LanguageGerman
Published 18.03.1999
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
GYROSCOPIC INSTRUMENTS
INFORMATION STORAGE
MEASURING
MEASURING DISTANCES, LEVELS OR BEARINGS
NAVIGATION
PHOTOGRAMMETRY OR VIDEOGRAMMETRY
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
SURVEYING
TESTING
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Summary:A memory cell with vertically stacked crossovers. In prior memory cells, crossover connections within the memory cell were implemented in the same device layer. This wasted valuable design space, since the crossovers were therefore required to sit side-by-side in the layout design. The present invention implements crossovers in different materials on different device layers. The crossovers may therefore be vertically stacked on top of each other, reducing the area of the memory cell.
Bibliography:Application Number: DE19971081675T