CMOS-Schaltung mit teilweise dielektrisch isolierten Source-Drain-Bereichen und Verfahren zu ihrer Herstellung
A CMOS circuit has all-around dielectrically insulated source-drain regions. Trenches are formed in the source-drain regions. The trenches are etched into the mono-crystalline silicon and filled with undoped or very lightly doped silicon. The completely or nearly completely depleted silicon in the t...
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Main Authors | , |
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Format | Patent |
Language | German |
Published |
21.10.1999
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Summary: | A CMOS circuit has all-around dielectrically insulated source-drain regions. Trenches are formed in the source-drain regions. The trenches are etched into the mono-crystalline silicon and filled with undoped or very lightly doped silicon. The completely or nearly completely depleted silicon in the trenches represents a dielectrically insulating layer and insulates the source-drain regions towards the adjacent silicon substrate. |
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Bibliography: | Application Number: DE19971006789 |