Halbleitervorrichtung und Verfahren für ihre Herstellung

A transistor has a P-type impurity implantation region (4) which is formed in a main surface (3) of an N-type semiconductor substrate (1) and which constitutes a main structure with the substrate. A channel stop structure formed in a peripheral portion of the substrate, has a trench (5) formed in th...

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Bibliographic Details
Main Authors TAKAHASHI, HIDEKI, AONO, SHINJI
Format Patent
LanguageGerman
Published 16.06.2011
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A transistor has a P-type impurity implantation region (4) which is formed in a main surface (3) of an N-type semiconductor substrate (1) and which constitutes a main structure with the substrate. A channel stop structure formed in a peripheral portion of the substrate, has a trench (5) formed in the main surface of the semiconductor substrate. An Independent claim is also included for power metal oxide semiconductor field effect transistor manufacture method.
Bibliography:Application Number: DE2002124003