Low-k dielectric layer patterning method for integrated circuits, involves forming patterned hard mask above low-k dielectric layer of semiconductor metallization layer
The method involves forming a patterned hard mask above a low-k dielectric layer (305) of a semiconductor metallization layer. The low-k dielectric layer is patterned by anisotropically etching using an etch mask. A resist mask is formed above a hard mask layer by patterning hard mask layer to form...
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| Main Authors | , , |
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| Format | Patent |
| Language | English German |
| Published |
02.11.2006
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| Subjects | |
| Online Access | Get full text |
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| Abstract | The method involves forming a patterned hard mask above a low-k dielectric layer (305) of a semiconductor metallization layer. The low-k dielectric layer is patterned by anisotropically etching using an etch mask. A resist mask is formed above a hard mask layer by patterning hard mask layer to form patterned hard mask and resist mask is removed.
Unter Verwendung einer nicht-metallischen Hartmaske zum Strukturieren dielektrischer Materialien mit kleinem epsilon moderner Halbleiterbauelemente wird ein höherer Grad an Ätzspurtreue erreicht. Die vorliegende Erfindung kann effizient auf "Kontaktloch zuerst-Graben zuletzt"- bzw. "Graben zuerst-Kontaktloch-zuletzt"-Prozessabläufe angewendet werden. |
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| AbstractList | The method involves forming a patterned hard mask above a low-k dielectric layer (305) of a semiconductor metallization layer. The low-k dielectric layer is patterned by anisotropically etching using an etch mask. A resist mask is formed above a hard mask layer by patterning hard mask layer to form patterned hard mask and resist mask is removed.
Unter Verwendung einer nicht-metallischen Hartmaske zum Strukturieren dielektrischer Materialien mit kleinem epsilon moderner Halbleiterbauelemente wird ein höherer Grad an Ätzspurtreue erreicht. Die vorliegende Erfindung kann effizient auf "Kontaktloch zuerst-Graben zuletzt"- bzw. "Graben zuerst-Kontaktloch-zuletzt"-Prozessabläufe angewendet werden. |
| Author | HUEBLER, PETER ZISTL, CHRISTIAN LEHR, MATTHIAS |
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| DocumentTitleAlternate | Verfahren zum Strukturieren eines Dielektrikums mit kleinem epsilon unter Anwendung einer Hartmaske |
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| Snippet | The method involves forming a patterned hard mask above a low-k dielectric layer (305) of a semiconductor metallization layer. The low-k dielectric layer is... |
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| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Low-k dielectric layer patterning method for integrated circuits, involves forming patterned hard mask above low-k dielectric layer of semiconductor metallization layer |
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