Signal generation circuit capable of preventing false triggering and improving speed of comparator
The utility model belongs to the field of power supply control, and particularly discloses a signal generation circuit capable of preventing false triggering and improving the speed of a comparator, which is characterized in that a signal input end of a current signal superposition circuit inputs a...
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Main Authors | , , , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
24.05.2024
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Subjects | |
Online Access | Get full text |
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Summary: | The utility model belongs to the field of power supply control, and particularly discloses a signal generation circuit capable of preventing false triggering and improving the speed of a comparator, which is characterized in that a signal input end of a current signal superposition circuit inputs a slope current, an output voltage and a fixed current of an error amplifier in a DC/DC (Direct Current/Direct Current) system; a superimposed current signal output by the current signal superimposed circuit, a detection signal of a gate logic potential of the upper power tube and a feedback signal output by the PWM comparator are input into a signal input end of the current-to-voltage circuit; a superposed signal output by the current-to-voltage circuit, a signal at the joint of the source electrode of the upper power tube and the inductor and a detection signal of the logic potential of the grid electrode of the upper power tube are input into the signal input end of the PWM comparator, and the PWM comparator outpu |
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Bibliography: | Application Number: CN202322912102U |