SiC trench MOSFET device

The utility model discloses a SiC trench MOSFET device which comprises a substrate layer, an N-drift region formed by epitaxy on the upper side of the substrate layer, a gate region trench formed on the upper surface of the N-drift region, silicon dioxide layers formed on the bottom and the side wal...

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Main Authors AN GUK-WOO, GAO CHANG, ZHOU GUO, LIAO LONGZHONG, LIU JIALIN, ZHANG LIJIANG, LIU XIANGWU, LI BO, ZHANG ZHIGUO, SHANG QINGJIE, ZHI JINHUA, FENG WANG, FU XINGZHONG
Format Patent
LanguageChinese
English
Published 12.05.2023
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Summary:The utility model discloses a SiC trench MOSFET device which comprises a substrate layer, an N-drift region formed by epitaxy on the upper side of the substrate layer, a gate region trench formed on the upper surface of the N-drift region, silicon dioxide layers formed on the bottom and the side wall of the gate region trench, and gate polysilicon filled in residual gaps on the silicon dioxide layers in the trench. The left side and the right side of the gate region groove are respectively provided with a P well region, an N + region and a P + region are respectively formed on each P well region, a grid electrode is formed on the upper surface of the polycrystalline silicon, two ends of the grid electrode extend to the edge of the N + region, a source electrode is formed on the upper surface of the P + region, the source electrode extends to the upper surface of the N + region, and the N + region is formed on the upper surface of the P + region. And a drain electrode is formed on the lower surface of the subs
Bibliography:Application Number: CN202223044477U