Chip packaging carrier plate and chip packaging structure

• Main Authors: WEI YEXIANG, XU GUANGZE, WEI JINGLIN, HE ZHONGLIANG
• Format: Patent
• Language: Chinese; English
• Published: 15.11.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The utility model discloses a chip packaging carrier plate and a chip packaging structure. The chip packaging carrier plate comprises a frame circuit and a bearing plate, the frame circuit comprises a plurality of unit circuits arranged in a matrix and a substrate, each unit circuit comprises a plurality of electrodes, and the electrodes comprise a top electrode and a bottom electrode; the top surface of the top electrode comprises at least one bonding pad, the bearing plate is pasted on the substrate and the bottom surface of the bottom electrode in a peelable manner, the bonding pad comprises a surface-mounted bonding pad, a bonding wire bonding pad or a solid crystal bonding pad, and the unit circuit comprises at least one bonding wire bonding pad and at least one surface-mounted bonding pad; the surface-mounted bonding pad comprises a tin coating, and the bonding wire bonding pad comprises a weldable precious metal coating. The surface-mounted bonding pad adopts the tin-plated bonding pad, so that printed