Numerical comparator based on full-spin logic device

• Main Authors: WANG SEN, LIU XIANGXING, JI XINYU, ZHOU RUIYUN
• Format: Patent
• Language: Chinese; English
• Published: 01.02.2022
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

The utility model discloses a numerical value comparator based on a full-spinning logic device. The numerical value comparator comprises a first input end A, a second input end B, a first three-input few-selection logic gate M31, a second three-input few-selection logic gate M32, a third three-input few-selection logic gate M33, a fourth three-input few-selection logic gate M34, a fifth three-input few-selection logic gate M35 and a phase inverter, the M31 and the phase inverter form a first signal output circuit; the M32 and the M33 are connected in parallel and are connected with the M35 in series to form a second signal output circuit; and the M34 and the phase inverter form a third signal output circuit. According to the utility model, the input interface circuit is used for providing input signals for the circuit, the three-input few-selection logic gate and the phase inverter are used for realizing a numerical value comparison function, electron spinning is used in the processes of information processin