Integrated circuit and device

Embodiments of the present disclosure relate to an integrated circuit and a device. The utility model relates to an integrated circuit including one or more rows of transistors. In one embodiment, anintegrated circuit includes a row of bipolar transistors including a plurality of first conductive re...

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Bibliographic Details
Main Authors PHILIPPE BOIVIN, OLIVIER WEBER, EMMANUEL PETITPREZ, JEAN-JACQUES FAGOT, EMELINE SOUCHIER
Format Patent
LanguageChinese
English
Published 24.12.2019
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Summary:Embodiments of the present disclosure relate to an integrated circuit and a device. The utility model relates to an integrated circuit including one or more rows of transistors. In one embodiment, anintegrated circuit includes a row of bipolar transistors including a plurality of first conductive regions, a second conductive region, and a common base between the first conductive regions and the second conductive region. The insulating trench is in contact with each of the bipolar transistors in the row of bipolar transistors. The conductive layer is located on the insulating trench and the common base, between the first conductive regions. The spacer layer is located between the conductive layer and the first conductive region. 本公开的实施例涉及包括集成电路和器件。本公开涉及包括一行或多行晶体管的集成电路。在一个实施例中,集成电路包括双极晶体管行,该双极晶体管行包括多个第一导电区域、第二导电区域以及共用基极,共用基极位于第一导电区域和第二导电区域之间。绝缘沟槽与双极晶体管行中的每个双极晶体管接触。导电层位于绝缘沟槽和共用基极上,位于第一导电区域之间。间隔件层位于导电层和第一导电区域之间。
Bibliography:Application Number: CN201920454682U