Program-controlled frequency doubling device based on PLL phase-locked loop and frequency divider

• Main Authors: ZHAO YIBO, ZHANG XIUZAI, RUAN WEIQI
• Format: Patent
• Language: English
• Published: 08.07.2015
• Subjects: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY

The utility model discloses a program-controlled frequency doubling device based on a PLL phase-locked loop and a frequency divider. The program-controlled frequency doubling device comprises a program-controlled frequency dividing PFD, a single-chip microcomputer, a display module, an independent key module, a low-pass filtering module, a voltage-controlled crystal oscillator module, a frequency-doubled signal buffering feedback and output module, a high-pass filtering module, an impedance matching module, a reference clock buffering module and a clock signal input module. According to the program-controlled frequency doubling device, the single-chip microcomputer serves as a micro-control center, the frequency synthesis chip ADF4106 with phase discriminating and program-controlled frequency dividing functions serves as a frequency synthesis center, frequency-doubled signals are generated by a low-pass filtering circuit and a high-frequency low-noise voltage-controlled crystal oscillator VCXO, a clock buffering chip ADCLK905 and an ADCLK925 chip buffer input and output signals and realize output of the frequency-doubled signals, and data display and user setting are realized by a TFT liquid crystal display module and the independent key module respectively. The PLL phase-locked loop and frequency divider based program-controlled frequency doubling device is simple in structure, stable in circuit, low in phase noise and high in practicability, and can realize output of wide-range frequency signals.