Multi-path high-speed ADC synchronous acquisition circuit

• Main Author: QIN YANZHAO
• Format: Patent
• Language: Chinese; English
• Published: 13.08.2014
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

The utility model provides a multi-path high-speed ADC synchronous acquisition circuit, which comprises four ADCs, an ADC power supply group matched with the ADCs, a synchronous clock generation circuit and a broadband signal conditioning circuit, wherein the ADC power supplies are respectively connected with the ADCs; the output end of the broadband conditioning circuit is respectively connected with the input ends of the ADCs; the output end of the synchronous clock generation circuit is respectively in a four-path mode connected with each ADC; the output ends of the ADCs are connected with an FMC circuit; the synchronous clock generation circuit comprises a clock generation chip and a zero delay clock chip; the broadband conditioning circuit comprises a front-end filter circuit, an AC coupling circuit and an impedance matching circuit connected in sequence; and root mean square jitter of the clock generation chip is smaller than 400fs, and in order to meet the signal to noise ratio and synchronization of t