Power system fault simulation circuit

The utility model discloses a power system fault simulation circuit, which comprises a load I, a load II, an insulated gate bipolar transistor (IGBT) module I and an IGBT module II, wherein the load I and the load II are connected on an output end of a step-down transformer T in series, the IGBT mod...

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Bibliographic Details
Main Author NI ZHAORUI
Format Patent
LanguageChinese
English
Published 23.04.2014
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Summary:The utility model discloses a power system fault simulation circuit, which comprises a load I, a load II, an insulated gate bipolar transistor (IGBT) module I and an IGBT module II, wherein the load I and the load II are connected on an output end of a step-down transformer T in series, the IGBT module I and the IGBT module II are connected with each other in series in the reverse direction, the IGBT module I and the IGBT module II which are connected with each other in series in the reverse direction are connected with the load II in parallel, the IGBT module I is connected with a diode I in parallel, the IGBT module II is connected with a diode II in parallel, and gate electrodes and emitting electrodes of the IGBT module I and the IGBT module II are all connected with a drive circuit. When an analog circuit system breaks down, the IGBT module IS1 and IGBT module IIS2 are controlled to break over through a digital signal processor (DSP) in the drive circuit, the load II is short at the moment, and output ci
Bibliography:Application Number: CN2014252146U