Thin-film transistor display panel and manufacturing method therefor

A thin film transistor array panel includes a pixel electrode formed on a substrate, a gate line formed on the pixel electrode, a gate insulating film formed on the gate line, a semiconductor formed on the gate insulating film, a data line and a drain electrode formed on the gate insulating film, an...

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Main Author KIM JOO-HAN,KANG SUNG-WOOK,LIM SOON-KWON,BOKU KOSHOKU,KIM SHI-YUL,LEE EUN-GUK,BAE YANG-HO,LEE BYEONG-JIN,CHOUNG JONG-HYUN,HONG SUN-YOUNG,KIM BONG-KYUN,SHIN WON-SUK
Format Patent
LanguageEnglish
Published 06.06.2007
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Summary:A thin film transistor array panel includes a pixel electrode formed on a substrate, a gate line formed on the pixel electrode, a gate insulating film formed on the gate line, a semiconductor formed on the gate insulating film, a data line and a drain electrode formed on the gate insulating film, and a passivation layer formed on portions of the data line and the drain electrode. The gate line includes a first film formed on the same layer and with the same material as the pixel electrode and a second film formed on the first film.
Bibliography:Application Number: CN20061140028