Separately strained N-channel and P-channel transistors

An integrated circuit with a first plurality of transistors formed on a first wafer and second plurality of transistors formed on a second wafer. At least a substantial majority of the transistor of the first transistor are of a first conductivity type and at least a substantial majority of the tran...

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Bibliographic Details
Main Author POZDER SCOTT K.,CELIK SALIH M.,MIN BYOUNG W.,ADAMS VANCE H
Format Patent
LanguageEnglish
Published 25.04.2007
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:An integrated circuit with a first plurality of transistors formed on a first wafer and second plurality of transistors formed on a second wafer. At least a substantial majority of the transistor of the first transistor are of a first conductivity type and at least a substantial majority of the transistors of the second plurality are of a second conductivity type. After wafers are bonded together, a portion of the second wafer is removed wherein the strain of the channels of the second plurality of transistors is more compressive than the strain of the channels of the first plurality of transistors.
Bibliography:Application Number: CN200580015236