Vertical pnp transistor and method of making same

The present invention relates to a device structure located in a semiconductor substrate and containing high performance vertical NPN and PNP transistors. Specifically, the vertical PNP transistor has an emitter region, and the vertical NPN transistor has an intrinsic base region. The emitter region...

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Bibliographic Details
Main Author GRAY PETER B.,VOEGELI BENJAMIN T
Format Patent
LanguageEnglish
Published 24.01.2007
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The present invention relates to a device structure located in a semiconductor substrate and containing high performance vertical NPN and PNP transistors. Specifically, the vertical PNP transistor has an emitter region, and the vertical NPN transistor has an intrinsic base region. The emitter region of the vertical PNP transistor and the intrinsic base region of the vertical NPN transistor are located in a single silicon germanium-containing layer, and they both contain single crystal silicon germanium. The present invention also relates to a method for fabricating such a device structure based on collateral modification of conventional fabrication processes for CMOS and bipolar devices, with few or no additional processing steps.
Bibliography:Application Number: CN200610101301