Memory output stage circuit and method of memory data output
A output stage circuit of storage consists of multiple pre-charging circuits as each precharging circuit being coupled to one of multiple fetching bit lines, multiplexer circuit for selecting out one of multiple fetching bit lines and coupling it to sensing amplification circuit, sensing amplificati...
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Main Author | |
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Format | Patent |
Language | English |
Published |
13.09.2006
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Subjects | |
Online Access | Get full text |
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Summary: | A output stage circuit of storage consists of multiple pre-charging circuits as each precharging circuit being coupled to one of multiple fetching bit lines, multiplexer circuit for selecting out one of multiple fetching bit lines and coupling it to sensing amplification circuit, sensing amplification circuit coupled to multiple fetching bit line through multiplexer circuit and used for comparing voltage on one of multiple bit lines with high potential and for outputting compared result signal to node of two outputs. |
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Bibliography: | Application Number: CN20051136110 |