Methods of forming integrated circuit devices having field effect transistors of different types in different device regions
A method of forming an integrated circuit device includes forming a non-planar field-effect transistor in a cell array portion of a semiconductor substrate and forming a planar field-effect transistor in a peripheral circuit portion of the semiconductor substrate. The non-planar field-effect transis...
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Main Author | |
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Format | Patent |
Language | English |
Published |
23.11.2005
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A method of forming an integrated circuit device includes forming a non-planar field-effect transistor in a cell array portion of a semiconductor substrate and forming a planar field-effect transistor in a peripheral circuit portion of the semiconductor substrate. The non-planar field-effect transistor may be selected from the group of a FinFET and a recessed gate FET. Dopants may be implanted into a channel region of the non-planar field-effect transistor, and a cell protection layer may be formed on the non-planar field-effect transistor. Then, dopants may be selectively implanted into a channel region of the planar field-effect transistor using the cell protection layer as a mask to block implanting of the dopants into the channel region of the non-planar field-effect transistor. |
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Bibliography: | Application Number: CN200510067049 |