Shallow junction shield groove technique for protecting active region area

This invention relates to a new STI process to protect the source area. With the integration degree rapidly increase, people integrates multiple circuits and devices in one chip. In order to ensure the core logic circuit high property and increases the capacity and density of the memory, this invent...

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Bibliographic Details
Main Authors SHOUMIAN CHEN, ZUOYA YANG
Format Patent
LanguageEnglish
Published 29.06.2005
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:This invention relates to a new STI process to protect the source area. With the integration degree rapidly increase, people integrates multiple circuits and devices in one chip. In order to ensure the core logic circuit high property and increases the capacity and density of the memory, this invention provides a new STI process to distinguish the high density silicon area and the silicon pad need to be improved.
Bibliography:Application Number: CN2004167836