Capacitance multiplier

A capacitance multiplier includes a self-biasing active load for generating a stable bias voltage without a separate current bias. In addition, the capacitance multiplier includes a cascode load within a multiplying section for increasing the output resistance and in turn the charging/discharging ef...

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Bibliographic Details
Main Authors HWANG INUI, LEE JAE-HEON, LEE HAN-II, KIM YOUNG-JIN
Format Patent
LanguageEnglish
Published 20.04.2005
Edition7
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
RESONATORS
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Summary:A capacitance multiplier includes a self-biasing active load for generating a stable bias voltage without a separate current bias. In addition, the capacitance multiplier includes a cascode load within a multiplying section for increasing the output resistance and in turn the charging/discharging efficiency. Furthermore, the capacitance multiplier is implemented with a plurality of multiplying paths to reduce effects of noise for more stable generation of the multiplied capacitance.
Bibliography:Application Number: CN200410095126