Method for reducing contamination of tools in semiconductor processing

An improved method of reducing contamination in processing of ICs is disclosed. The method includes forming a contamination protection layer on at least the back surface of the substrate. The contamination protection layer comprises a low diffusion factor and can be cleaned efficiently. In one embod...

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Bibliographic Details
Main Authors ZHUANG HAOREN, HORNIK KARL, NATORI KATSUAKI, MOON BUM-KI, TSUNASHIMA YOSHITAKA, YABUKI MOTO, BEITEL GERHARD ADOLF
Format Patent
LanguageEnglish
Published 26.01.2005
Edition7
Subjects
ADHESIVES
BASIC ELECTRIC ELEMENTS
CHEMICAL PAINT OR INK REMOVERS
CHEMISTRY
COATING COMPOSITIONS, e.g. PAINTS, VARNISHES ORLACQUERS
COMPOSITIONS BASED THEREON
CORRECTING FLUIDS
DYES
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
FILLING PASTES
INKS
METALLURGY
MISCELLANEOUS APPLICATIONS OF MATERIALS
MISCELLANEOUS COMPOSITIONS
NATURAL RESINS
ORGANIC MACROMOLECULAR COMPOUNDS
PAINTS
PASTES OR SOLIDS FOR COLOURING OR PRINTING
POLISHES
SEMICONDUCTOR DEVICES
THEIR PREPARATION OR CHEMICAL WORKING-UP
USE OF INORGANIC OR NON-MACROMOLECULAR ORGANIC SUBSTANCES ASCOMPOUNDING INGREDIENTS
USE OF MATERIALS THEREFOR
WOODSTAINS
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Summary:An improved method of reducing contamination in processing of ICs is disclosed. The method includes forming a contamination protection layer on at least the back surface of the substrate. The contamination protection layer comprises a low diffusion factor and can be cleaned efficiently. In one embodiment, the contamination protection layer comprises HCD silicon nitride.
Bibliography:Application Number: CN2004107640