Interconnect module with reduced power distribution impedance

一种用于集成电路芯片的互连模块,包括一种高介电常数的嵌入式薄层电容结构,该结构能降低功率分配阻抗,从而促进工作频率的升高。该互连模块能通过连接焊球,可靠地将集成电路芯片固定到印刷线路板上,在工作频率超过1.0千兆赫时,提供小于或等于约0.60欧姆降低的功率分配阻抗。 An interconnect module for an integrated circuit chip incorporates a thin, high dielectric constant embedded capacitor structure to provide reduced power distribution...

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Bibliographic Details
Main Author HANSON DAVID A.,PETEFISH WILLIAM G.,SYLVESTER MARK F
Format Patent
LanguageChinese
English
Published 17.11.2004
Edition7
Subjects
Online AccessGet full text

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Summary:一种用于集成电路芯片的互连模块,包括一种高介电常数的嵌入式薄层电容结构,该结构能降低功率分配阻抗,从而促进工作频率的升高。该互连模块能通过连接焊球,可靠地将集成电路芯片固定到印刷线路板上,在工作频率超过1.0千兆赫时,提供小于或等于约0.60欧姆降低的功率分配阻抗。 An interconnect module for an integrated circuit chip incorporates a thin, high dielectric constant embedded capacitor structure to provide reduced power distribution impedance, and thereby promote higher frequency operation. The interconnect module is capable of reliably attaching an integrated circuit chip to a printed wiring board via solder ball connections, while providing reduced power distribution impedance of less than or equal to approximately 0.60 ohms at operating frequencies in excess of 1.0 gigahertz.
Bibliography:Application Number: CN20028016537