Multiplier circuit

• Main Author: MELIS BRUNO,ETTORRE DONATO,RUSCITTO ALFREDO
• Format: Patent
• Language: Chinese; English
• Published: 10.11.2004
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

本发明提出的迭代乘法器电路(10)包括将相应输入信号(Z#-[n]，J#-[n])再分成一个为刚小于或等于输入信号的2的幂的第一部分(msb(Z#-[n])，msb(J#-[n]))和一个与输入信号与上述第一部分之差相应的第二部分(Z#-[n]-msb(Z#-[n])，J#-[n]-msb(J#-[n]))的模块(15至18)。移位器模块(19)通过实现与为2的幂的数的乘法运算的移位操作产生一个相应输出信号。电路按照一种通用的迭代方案工作，在每次迭代中计算出输出信号(X・Y)的与一个都为2的幂的两个因子的积和两个至少有一个为2的幂的两个因子的积相应的三个分量。迭代方案中的迭代次数是可控的，因此允许改变计算输出值(X・Y)的精度。 An iterative multiplier circuit (10) comprises modules (15 to 18) that subdivide the respective input signals (Zn, Jn) into a first part (msb(Zn), msb(Jn)) that is the power of 2 immediately lower or equal to the input signal and a second part (Zn-msb(Zn), Jn-msb(J)) corresponding to the difference between the input signal and the aforesaid first part. A shift module (19) generates a respective output signal through shift operations that implement the multiplication operation for numbers that are powers of 2. The circuit operates according to a general iterative scheme in which at each step three components of the output signal (X,Y) are computed, corresponding to the product of two numbers that are powers of 2 and to two products in which at least one of the factors is a power of 2. The number of steps in the iteration scheme is controllable, thus allowing to vary the accuracy with which the output value (X,Y) is calculated.