Method and apparatus for viterbi detector state metric re-normalization

• Main Author: STOCKMANNS HEINER,RAE JAMES W.,BLISS WILLIAM G.,KARABED RAZMIK
• Format: Patent
• Language: Chinese; English
• Published: 18.08.2004
• Edition: 7
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY; INFORMATION STORAGE; INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER; PHYSICS

维特比侦测器状态计量再规范之方法及装置。该方法包含制造一具有预定数目状态之维特比侦测器(138)，其中该维特比侦测器(138)储存每一状态的状态计量值以及旁支计量值，而且该维特比侦测器(138)实现一卷积图(trellis diagram)。该方法包含建构一维特比侦测器(138)，以支持一具有g+h'个位的状态计量值。用以代表该旁支计量值所需的位数以g表示，而用以代表该状态计量值所需的额外位数以h'表示。该额外位数h'少于该额外位数h，h由以下的不等式决定：2#+[h-1]-h≥K-1，其中K代表该卷积图的缩限长度。 A method and apparatus for Viterbi detector state metric re-normalization. The method includes fabricating a Viterbi detector (138) having a predetermined number of states, wherein the Viterbi detector (138) stores a state metric value and a branch metric value for each state, and wherein the Viterbi detector (138) implements a trellis diagram. The method includes constructing a Viterbi detector (138) which can support a state metric value having g+h' number of bits. The number of bits needed to represent the branch metric value is represented by (g) and the additional number of bits needed to represent the state metric value is represented by (h'). The additional number of bits (h') is less than the additional number of bits (h) determined using the following inequality: 2-h>=K-1, wherein K represent the constraint length of the trellis diagram.