BIST method for testing cut-off frequency of low-pass filters
一种用于实现确定在混合信号集成电路(IC)中的滤波器电路的频率特性的内部自测(BIST)的方法和电路。该方法包括将一个被测量的电路(CUT)插入到一个看起来好像∑-δ调制回路的反馈回路中并且调节反馈回路以便使其在滤波器的截止频率处振荡。可以很容易地使用芯片上的计数器或者数字自动测试设备测量振荡频率。反馈回路最好包括一个比较器,一个相位延迟元件,诸如一个延迟线,和一个1位DAC,其中比较器被连接到CUT的输出端,1位DAC的输出端被连接到CUT的输入端。可以通过调节延迟线(即:一个n位长度的移位寄存器)来调谐反馈回路的相位延迟直到获得振荡频率。在低通滤波器电路的情况下,调谐的振荡频率对应于CUT...
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Main Authors | , |
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Format | Patent |
Language | Chinese English |
Published |
07.01.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | 一种用于实现确定在混合信号集成电路(IC)中的滤波器电路的频率特性的内部自测(BIST)的方法和电路。该方法包括将一个被测量的电路(CUT)插入到一个看起来好像∑-δ调制回路的反馈回路中并且调节反馈回路以便使其在滤波器的截止频率处振荡。可以很容易地使用芯片上的计数器或者数字自动测试设备测量振荡频率。反馈回路最好包括一个比较器,一个相位延迟元件,诸如一个延迟线,和一个1位DAC,其中比较器被连接到CUT的输出端,1位DAC的输出端被连接到CUT的输入端。可以通过调节延迟线(即:一个n位长度的移位寄存器)来调谐反馈回路的相位延迟直到获得振荡频率。在低通滤波器电路的情况下,调谐的振荡频率对应于CUT的截止频率。
A method and circuitry for implementing a built-in self test (BIST) for determining the frequency characteristics of filter circuits in mixed-signal integrated circuits (ICs). The method comprises inserting a Circuit Under Test (CUT) into a feedback loop that looks like a sigma delta modulation loop and adjust the feedback loop so that it oscillates at the cut-off frequency of the filter. The frequency of oscillation can then easily be measured using either on on-chip counter or digital automated testing equipment. The feedback loop preferably comprises a comparator, a phase-delay component, such as a delay-line, and a one-bit DAC (digital-to-analog converter), wherein the comparator is connected to the output of the CUT, and the output of the one-bit DAC is connected to the input of the CUT. The phase delay of the feedback loop can be tuned through adjustment of the delay-line (e.g., an n-length shift register) until an oscillation frequency is obtained. In the case of low-pass filters circuits, the tuned frequency of oscillation corresponds to the cut-off frequency of the CUT. |
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Bibliography: | Application Number: CN20018016231 |