Preparation method of silicon carbide VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) capable of inhibiting drain voltage overshoot
The invention provides a preparation method of a silicon carbide VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) for inhibiting drain voltage overshoot, which comprises the following steps of: depositing metal on one side surface of a silicon carbide substrate to form a drain metal layer,...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
09.08.2024
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a preparation method of a silicon carbide VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) for inhibiting drain voltage overshoot, which comprises the following steps of: depositing metal on one side surface of a silicon carbide substrate to form a drain metal layer, and depositing and growing on the other side surface of the silicon carbide substrate to form a drift layer; depositing a barrier layer above the drift layer, etching to form a through hole, and depositing to form a leakage suppression region; removing the original barrier layer, and depositing to form a conductive region; forming a barrier layer above the conductive region, etching the barrier layer and the conductive region to form a through hole, and performing deposition through the through hole to form a gate dielectric layer; the original barrier layer is removed, a barrier layer is formed again, the barrier layer is etched, the gate dielectric layer is etched, a groove is formed, metal is deposited, and a g |
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Bibliography: | Application Number: CN202410575150 |