Transistor with main gate wrapping floating secondary gate

• Main Authors: PANDEY SHREE MANI, SHARMA SAURABH, KRISHNASAMY RAJAVELU
• Format: Patent
• Language: Chinese; English
• Published: 12.07.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a transistor having a main gate wrapping a floating secondary gate. A structure including a substrate and a transistor on the substrate is disclosed. The transistor includes a barrier layer over a substrate and a multi-gate structure on the barrier layer. The multi-gate structure includes a primary gate and a secondary gate. The secondary gate has opposing sidewalls, opposing end walls, and a top surface. The primary gate includes substantially vertically oriented first portions on the barrier layer, the first portions being positioned laterally adjacent to opposite sidewalls of the secondary gate, respectively. Optionally, the primary gate also respectively includes a substantially horizontally oriented second portion on a top surface of the secondary gate and/or a substantially vertically oriented third portion on an opposite end wall. The secondary gate may be a floating gate. A method of forming the structure is also disclosed. 本公开涉及具有包裹浮置副栅极的主栅极的晶体管。公开了一种包括衬底和位于衬底上的晶体管的结构。晶体管包括位于