STRUCTURES WITH BURIED DOPED REGIONS COUPLING SOURCE LINE CONTACT TO GATE STRUCTURES

• Main Authors: RICHTER RAINER, SETHI VIKRAM, DUENKEL STEFAN
• Format: Patent
• Language: Chinese; English
• Published: 05.07.2024
• Subjects: ELECTRICITY

The present disclosure provides a structure having a buried doped region for coupling a source line contact to a gate structure of a memory cell. A structure according to the present disclosure includes a memory cell having a gate structure extending over a substrate along a first lateral direction. The buried doped region is within the substrate and extends along a second lateral direction from below the gate structure to a portion of the substrate laterally away from the gate structure. A source line contact is on the portion of the substrate laterally away from the gate structure. The buried doped region couples the source line contact to the gate structure of the memory cell through the lower surface of the gate structure. 本公开提供了一种具有用于将源极线接触耦合到存储器基元的栅极结构的掩埋掺杂区的结构。根据本公开的结构包括存储器基元，该存储器基元具有沿着第一横向方向在衬底上方延伸的栅极结构。掩埋掺杂区位于衬底内，并且沿着第二横向方向从栅极结构下方延伸到横向远离栅极结构的衬底的一部分。源极线接触位于横向远离栅极结构的衬底的该部分上。掩埋掺杂区通过栅极结构的下表面将源极线接触耦合到存储器基元的栅极结构。