General matrix multiplication optimization method and device on multi-core DSP (Digital Signal Processor)

The invention discloses a general matrix multiplication optimization method and device on a multi-core DSP (Digital Signal Processor). The method comprises the following steps: acquiring matrix parameter information, matrix mode information and DSP parameter information of a multi-core DSP chip; on...

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Bibliographic Details
Main Authors YU KAINAN, FANG JIANBIN, DONG DEZUN
Format Patent
LanguageChinese
English
Published 02.07.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The invention discloses a general matrix multiplication optimization method and device on a multi-core DSP (Digital Signal Processor). The method comprises the following steps: acquiring matrix parameter information, matrix mode information and DSP parameter information of a multi-core DSP chip; on the basis of the multi-core DSP chip matrix parameter information, the matrix mode information and the DSP parameter information, micro-kernel shape information is determined; the micro kernel shape information comprises data column information, data row information and expansion factor information. And determining general matrix multiplication result information of the multi-core DSP chip based on the multi-core DSP chip matrix parameter information, the matrix mode information, the DSP parameter information and the micro-kernel shape information. Therefore, the multi-core DSP chip processing method and the multi-core DSP chip processing device are favorable for fully realizing overlapping and vector reduction of
Bibliography:Application Number: CN202410500756