Three-dimensional memory device programming with reduced interference

• Main Authors: JIA JIANQUAN, ZHAO XIANGNAN, YOU KAIKAI, SONG YALI, MIN YUANYUAN
• Format: Patent
• Language: Chinese; English
• Published: 25.06.2024
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

A 3D memory device may include a first memory layer, a second memory layer, and a first dummy memory layer between the first memory layer and the second memory layer; the peripheral circuit is coupled with the first memory layer, the second memory layer and the first dummy memory layer, and the peripheral circuit is configured to perform programming operation on a memory unit corresponding to the first memory layer within a first pre-charging period of performing programming operation on the memory unit corresponding to the first memory layer, applying a first pre-charge voltage to the first dummy memory layer; and applying a second pre-charging voltage smaller than the first pre-charging voltage to the first dummy memory layer in a second pre-charging period in which programming operation is performed on the memory unit corresponding to the first memory layer after programming operation is performed on the memory unit corresponding to the second memory layer. 一种3D存储器器件可以包括第一存储器层、第二存储器层、以及在所述第一存储器层与所述第二存储器层之间