Processor and task scheduling method thereof, chip and storage medium

The invention discloses a processor and a task scheduling method thereof, a chip and a storage medium, the processor comprises an instruction processing unit, at least two function units and a register, and at least one function unit in the processor is an accelerator; the accelerator serves as a fu...

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Bibliographic Details
Main Authors DUAN CHANGCHAO, HAN SHU, YIN LEIZU, WU PANWANG
Format Patent
LanguageChinese
English
Published 25.06.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The invention discloses a processor and a task scheduling method thereof, a chip and a storage medium, the processor comprises an instruction processing unit, at least two function units and a register, and at least one function unit in the processor is an accelerator; the accelerator serves as a functional unit of the processor and is tightly coupled with other units of an internal instruction of the processor, register resources of the processor are shared by the accelerator, the occupied area of a storage space of the accelerator is reduced, unnecessary repeated read-write power consumption is omitted, and therefore communication delay between the processor and the accelerator is reduced, and the service life of the accelerator is prolonged. And different transmitting queues can transmit instructions to different functional units (which can comprise accelerators) at the same time, so that parallel processing of the instructions is realized, and the processor has relatively large data throughput and relativ
Bibliography:Application Number: CN202211667323