Test structure and test method of semiconductor chip
The invention provides a test structure and a test method of a semiconductor chip. The semiconductor chip is provided with a grid electrode and a source electrode; the test structure of the semiconductor chip comprises a grid electrode bonding pad which is electrically connected to all grid electrod...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
09.04.2024
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a test structure and a test method of a semiconductor chip. The semiconductor chip is provided with a grid electrode and a source electrode; the test structure of the semiconductor chip comprises a grid electrode bonding pad which is electrically connected to all grid electrodes through a grid lead, the grid lead comprises at least one grid bus and a plurality of grid branch lines, the grid bus is led out from the grid electrode bonding pad, and each grid electrode is connected to the grid bus through one grid branch line; the source electrode bonding pad is electrically connected to all the source electrodes; and a test pad connected to the gate bus through a test lead. According to the technical scheme, the test bonding pad connected to the grid bus is additionally arranged in the test structure and is used for respectively pressurizing the grid bonding pad and the test bonding pad to perform two times of hot spot signal acquisition, and whether the grid bonding pad is a chip failure |
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Bibliography: | Application Number: CN202410010686 |