Semiconductor device with deep trench isolation and method

• Main Authors: KIM SUNG-HYUN, KIM KWANG IL, KANG YANG-BEOM, HAN SANG-MIN
• Format: Patent
• Language: Chinese; English
• Published: 02.04.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a semiconductor device with deep trench isolation and a method. A manufacturing method for a semiconductor device includes: forming a first gate structure and a second gate structure on a substrate; forming a deep trench isolation (DTI) hard mask on the first gate structure and the second gate structure; forming deep trench isolation between the first gate structure and the second gate structure; depositing a first undoped oxide layer in the deep trench isolation; performing a first etch-back process on the first undoped oxide layer to remove a portion of the undoped oxide layer; depositing a first deep trench isolation (DTI) gap filling layer on the remaining portion of the undoped oxide layer, and performing a second etch-back process on the first DTI gap filling layer; depositing a second DTI gap filling layer to seal the deep trench isolation, and forming a planarized second DTI gap filling layer through a planarization process; and depositing a second undoped layer on the planari