On-chip cache allocation method of deep neural network multi-core accelerator and related device
The invention provides an on-chip cache allocation method for a deep neural network multi-core accelerator, and the method comprises the steps: determining on-chip cache demands of output features of corresponding layers of nodes at two ends of each edge according to the topological sequence of each...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
19.03.2024
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Subjects | |
Online Access | Get full text |
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