Automatic redistribution layer via generation

A system and method for automatically generating an arrangement of vias within a redistribution layer of a semiconductor package is described. A user defines attributes to be used for automatic via generation in a redistribution layer of a semiconductor package (702). Circuitry of a processor of a c...

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Bibliographic Details
Main Authors GARDI RENATOMATULLA, VENKATARAMANI, RAJAGOPALAN, SANTOS WARREN ALEXANDER, MARTINEZ RYAN, SURIEL, DENNIS, GLENN, LOCHANTA
Format Patent
LanguageChinese
English
Published 01.03.2024
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