Two-dimensional transistor and preparation method and polarity regulation and control method thereof

The embodiment of the invention provides a two-dimensional transistor, a preparation method thereof and a polarity regulation and control method, and belongs to the field of transistors. The two-dimensional transistor comprises a substrate covered with a gate dielectric layer; the ferroelectric medi...

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Bibliographic Details
Main Authors YU JINRAN, SUN QIJUN
Format Patent
LanguageChinese
English
Published 16.01.2024
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Summary:The embodiment of the invention provides a two-dimensional transistor, a preparation method thereof and a polarity regulation and control method, and belongs to the field of transistors. The two-dimensional transistor comprises a substrate covered with a gate dielectric layer; the ferroelectric medium layer is in contact with a part of the upper surface of the gate dielectric layer; a first region of the two-dimensional bipolar semiconductor layer is in contact with the upper surface of the gate dielectric layer, and a second region of the two-dimensional bipolar semiconductor layer is in contact with the upper surface of the ferroelectric dielectric layer; the source electrode is arranged on the second area, and the drain electrode is arranged on the first area. The invention has the advantages that the design of the asymmetric ferroelectric grid has higher flexibility and reconfigurability, and can adapt to the requirements of different electrical characteristics; by adopting the two-dimensional bipolar sem
Bibliography:Application Number: CN202311160844