Top gate field effect transistor and preparation method thereof
The invention provides a top gate field effect transistor and a preparation method thereof. The top gate field effect transistor comprises a substrate layer, an active layer, an interface passivation layer, a gate dielectric layer, a top gate electrode, a source electrode and a drain electrode, the...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
09.01.2024
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a top gate field effect transistor and a preparation method thereof. The top gate field effect transistor comprises a substrate layer, an active layer, an interface passivation layer, a gate dielectric layer, a top gate electrode, a source electrode and a drain electrode, the interface passivation layer is formed on the active layer and is in direct contact with the active layer, and the gate dielectric layer is formed on the interface passivation layer. The interface passivation layer can passivate the surface of the active layer, prevent oxygen from diffusing into the active layer, and provide a nucleation center for deposition of the gate dielectric layer. According to the invention, hysteresis, frequency dispersion and gate leakage current of the device can be effectively reduced, the electrical performance and reliability of the device are improved, and the application potential of the carbon-based device in the field of advanced technology node integrated circuits is expanded.
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Bibliography: | Application Number: CN202210742669 |