Chip testing method and system and computer readable storage medium
The invention discloses a chip testing method and system and a computer readable storage medium, the chip testing system comprises a control module and a power supply module, the control module is coupled with the power supply module and outputs a control signal to the power supply module based on a...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
01.12.2023
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Subjects | |
Online Access | Get full text |
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Summary: | The invention discloses a chip testing method and system and a computer readable storage medium, the chip testing system comprises a control module and a power supply module, the control module is coupled with the power supply module and outputs a control signal to the power supply module based on an acquired configuration file; the power supply module comprises a plurality of target power supply units, and the plurality of target power supply units are coupled with a plurality of power supply pins of a target chip in a one-to-one correspondence manner; wherein the configuration file comprises an identifier of the target power supply unit and a power-on time sequence of the target power supply unit; the control signal is suitable for controlling the power supply state of the corresponding target power supply unit based on the power-on time sequence of the target power supply unit. By adopting the scheme, the power-on time sequence of the power supply module can be flexibly adjusted.
一种芯片测试方法及系统、计算机可读存储介质,所述芯片 |
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Bibliography: | Application Number: CN202311095813 |