Wafer and wafer processing method

• Main Authors: SAKAMOTO TAKESHI, YAMAMOTO KAZUMA, NAGURA KEISUKE
• Format: Patent
• Language: Chinese; English
• Published: 28.11.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a wafer and a wafer processing method. A wafer in which a plurality of semiconductor chips are obtained by performing an expansion step after forming a modified region along a line, the wafer having a plurality of chip regions divided by chip division lines as lines, the chip regions having: a chip section that constitutes the semiconductor chips; and a cutting part which is a part cut from the chip part and is continuous with the chip part via an opening line, the opening line is a line set in a way that an opening part with a notch shape is formed in the semiconductor chip, and the opening line is set in a way that the width of the opening part expands towards the opening end side or becomes a certain value. 本发明涉及晶圆及晶圆的加工方法。晶圆是在沿线形成了改质区域后通过实施扩展工序而得到多个半导体芯片的晶圆，具有由作为线的芯片划分线划分的多个芯片化区域，芯片化区域具有：芯片部，其构成半导体芯片；以及切割部，其是从芯片部切割的部分，经由开口线与芯片部连续，该开口线是以在半导体芯片形成有切口形状的开口部的方式设定的线，开口线以开口部的宽度朝向开口端侧扩展或成为一定的方式设定。