Successive approximation register analog-to-digital converter

• Main Authors: JIN BANGYAN, ZENG WEIXIN, CHEN GUANDA
• Format: Patent
• Language: Chinese; English
• Published: 21.11.2023
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY; PULSE TECHNIQUE

The invention provides a successive approximation register analog-to-digital converter, comprising: a digital-to-analog converter, a comparator, and a successive approximation register logic circuit, the digital-to-analog converter, the comparator, and the successive approximation register logic circuit being configured to form a loop for successive approximation of a digital representation of an analog input, wherein the successive approximation register logic circuit comprises a plurality of latches; and each of the latches connects the comparator to one bit control terminal of the digital-to-analog converter using a single gate delay circuit. 本发明提供逐次逼近寄存器模数转换器，包括：数模转换器、比较器以及逐次逼近寄存器逻辑电路，所述数模转换器、所述比较器以及所述逐次逼近寄存器逻辑电路被配置成形成用于对模拟输入的数字表示进行逐次逼近的环路，其中：所述逐次逼近寄存器逻辑电路包括多个锁存器；并且每一个所述锁存器使用单门延迟电路将所述比较器接线至所述数模转换器的一个位控制端子。