Matrix inversion coprocessor and processor group

The invention discloses a matrix inversion coprocessor and a processor group, and the matrix inversion coprocessor comprises an EAI interface unit which is used for being connected with a decoding execution unit and a memory access execution unit in a main processor corresponding to the coprocessor;...

Full description

Saved in:
Bibliographic Details
Main Authors HE DIAN, ZHANG YE, ZHA MENGFAN, LIN ZHENHUA, WANG DONG, WU YONG, SONG ZIQI, LI PENGKAI, ZHOU SHIHAO, WANG WENLIN
Format Patent
LanguageChinese
English
Published 10.11.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:The invention discloses a matrix inversion coprocessor and a processor group, and the matrix inversion coprocessor comprises an EAI interface unit which is used for being connected with a decoding execution unit and a memory access execution unit in a main processor corresponding to the coprocessor; the vector coding unit is internally provided with four self-defined inversion instructions, is connected with the EAI interface unit and is used for judging whether the operation instruction information is the self-defined inversion instructions or not and decoding the operation instruction information; the vector control unit is connected with the vector coding unit and is used for generating a vector operation control signal according to the decoding information transmitted by the vector coding unit and sending the vector operation control signal and the operation data information to the vector operation unit; and the vector operation unit is used for starting a corresponding vector operation module to complete
Bibliography:Application Number: CN202310828811