Packaging structure and packaging method for solving digital-analog interference

• Main Authors: MIN YUNCHUAN, DU JUN, PENG YIHONG
• Format: Patent
• Language: Chinese; English
• Published: 24.10.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention provides a packaging structure and a packaging method for solving digital-analog interference. The packaging structure comprises a digital-analog hybrid chip, a packaging frame and a plastic packaging body for packaging the digital-analog hybrid chip and the packaging frame, the digital-analog hybrid chip is divided into a digital part and an analog part; a digital signal bonding pad and an analog signal bonding pad corresponding to the digital part and the analog part are arranged on the upper surface of the digital-analog hybrid chip; the grounding pads on the lower surface of the digital-analog hybrid chip comprise a digital grounding pad and an analog grounding pad corresponding to the digital part and the analog part; the packaging frame comprises a packaging upper layer pin, a packaging lower layer pin and a shielding ring arranged between the packaging upper layer pin and the packaging lower layer pin; the packaging upper layer pin and the packaging lower layer pin are respectively bonded