Low delay synthesizer
In some aspects, the disclosure provides a method for generating a frame. The method includes receiving (502) a first fence indicating that a hardware component has consumed a first frame stored in a display processor unit (DPU) buffer; retrieving a plurality of layers from the application buffer in...
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Main Authors | , , , , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
20.10.2023
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Subjects | |
Online Access | Get full text |
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Summary: | In some aspects, the disclosure provides a method for generating a frame. The method includes receiving (502) a first fence indicating that a hardware component has consumed a first frame stored in a display processor unit (DPU) buffer; retrieving a plurality of layers from the application buffer in response to receiving the first fence (504), the plurality of layers corresponding to the second frame; determining (506) to process the plurality of layers for synthesizing a second frame using both the DPU and a graphics processing unit (GPU); and retrieving the first fence from the DPU buffer and generating a second fence (508).
在一些方面,本公开内容提供了一种用于生成帧的方法。该方法包括接收(502)第一栅栏,该第一栅栏指示硬件组件已经消耗了存储在显示处理器单元(DPU)缓冲器中的第一帧;响应于接收到第一栅栏从应用缓冲器获取多个层(504),该多个层对应于第二帧;确定(506)使用DPU和图形处理单元(GPU)两者来处理所述多个层以用于合成第二帧;以及从DPU缓冲器获取第一栅栏并生成第二栅栏(508)。 |
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Bibliography: | Application Number: CN202280014114 |