Data flow path device suitable for storage and calculation integrated array and method thereof
The invention provides a data flow path device suitable for a storage and calculation integrated array and a method thereof. The device comprises a global buffer area which is used for caching an intermediate result of a reasoning process and transmitting ready data of a next step to a waiting area...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
20.10.2023
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a data flow path device suitable for a storage and calculation integrated array and a method thereof. The device comprises a global buffer area which is used for caching an intermediate result of a reasoning process and transmitting ready data of a next step to a waiting area register group; the waiting area register group is used for storing and driving input data to enter the storage and calculation integrated array for calculation; the storage and calculation integrated array is used for realizing convolution operation and full connection layer calculation in a neural network reasoning process according to pre-mapped weight information and transmitting an obtained calculation intermediate result to the single-instruction multi-data-stream module; and the single-instruction multi-data-stream module is used for realizing pooling operation in a neural network reasoning process, activating functions and transmitting a result to the global buffer area. According to the data flow path devi |
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Bibliography: | Application Number: CN202310744336 |