General extraction method for offset, gain and time offset errors in TIADC (Time Interleaved Analog to Digital Converter)

• Main Authors: YANG CHAO, ZHAO RUI, ZHOU XIANGJUN, ZHANG YANHONG, YIN MAOWEI, YI YUAN, ZHENG LINKUN, QIU FUJUN, LI LU, HE QING
• Format: Patent
• Language: Chinese; English
• Published: 03.10.2023
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

The invention provides a general extraction method for offset, gain and time offset errors in a TIADC (Time-Interleaved Analog to Digital Converter), which comprises the following steps of: firstly, proposing a main thought according to a mathematical expression, deducing a structure for extracting various errors on the basis, and proving a general scheme for extracting the errors. Finally, system-level simulation is provided to indicate the correct correction effect of the algorithm on the 12-bit 4-channel TIADC. The invention utilizes a background correction process based on a reference ADC, and the main advantage of the architecture is that it provides the possibility of using only a single-loop feedback system to correct offset, gain and timing bias. And the target is realized by adjusting the response coefficient of each error. 本发明提供TIADC中偏移、增益和时间偏移误差的通用提取方法，包括，首先根据数学表达式提出主要思路，在此基础上，推导出了提取各种误差的结构，并证明了提取误差的通用方案。最后，提供了系统级的仿真，以表明该算法对12位4通道TIADC的正确校正效果。本发明利用基于参考ADC进行背景校正过程，该架构的主要优点是，它提供了仅使用单回路反馈系统来校正偏移、增益和定时