Asynchronous reset integrated circuit

• Main Authors: WEINBERG YOAV, MINTZ, LAWRENCE, ZLOTNIK LIDIA
• Format: Patent
• Language: Chinese; English
• Published: 19.09.2023
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

The invention relates to an asynchronous reset integrated circuit. A plurality of triggers of an integrated circuit (IC) (e.g., ASIC) are electrically connected in a predefined series. The scan input gate of any given flip-flop in the predefined series is electrically connected to one of the Q output gate or the Q inverted output gate of an adjacent flip-flop in the predefined series. Reset operations of the IC occur by feeding a bit string of the same bit (e.g., all zero) through the scan input gate of a first flip-flop of the plurality of flip-flops to reset the plurality of flip-flops without requiring reset circuitry and resulting in power savings for the IC. 本公开涉及异步复位集成电路。集成电路IC(例如，ASIC)的多个触发器以预定义系列电连接。所述预定义系列中的任何给出触发器的扫描输入门电连接到所述预定义系列中的邻近触发器的Q输出门或Q反相输出门中的一者。所述IC的复位操作通过将相同位(例如，全为零)的位串馈送通过所述多个触发器中的第一触发器的所述扫描输入门以复位所述多个触发器而发生，而不需要复位电路系统且带来所述IC的功率节省。