Redundant interlocking anti-multi-bit single event upset flip-flop circuit

• Main Authors: SUN YU, YU CHUNQING, BAO YIHAO, LI TONGDE, WANG LIANG, YUAN JINGSHUANG, WANG YAKUN, DU QIAN, WANG YONG, ZHAO YUANFU, ZHU YONGQIN
• Format: Patent
• Language: Chinese; English
• Published: 04.08.2023
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

The invention discloses a redundancy interlocking anti-multi-bit single event upset flip-flop circuit. The redundancy interlocking anti-multi-bit single event upset flip-flop circuit comprises an input and output circuit, a transmission gate circuit, a clock output circuit and a redundancy interlocking master-slave latch circuit. The inverter circuit is used for inverting an input data signal D, a clock signal and outputting data to an output end Q of the flip-flop circuit. The transmission gate circuit is used for controlling propagation of signals in the master-slave latches. And the redundant interlocking master-slave latch circuit is used for latching data and ensuring that a signal is kept in a correct state when the circuit is subjected to single-particle radiation. The circuit designed by the invention aims at single event upset, and is good in reinforcing effect, simple in circuit design and easy to implement. 本申请公开了一种冗余互锁的抗多位单粒子翻转触发器电路，包括输入输出电路、传输门电路、时钟输出电路以及冗余互锁的主从锁存器电路。反相器电路用于反相输入数据信号D、时钟信号以及输出数据到触